In typical processes of mass producing semiconductor chips for subsequent Tape Automated Bonding (TAB) or flip-chip (face-down) assembly, bare chip pads are prepared for connection to a substrate by a complex photolithographic plating process performed on an entire semiconductor wafer. Such a typical plating process is described in detail in an article by T. S. Liu, W. R. Rodrigues de Miranda and P. R. Zipperlin, "A Review of Wafer Bumping for Tape Automated Bonding", Solid State Technology, Vol. 23, No. 3, 71-76 (March 1980), the entirety of which is incorporated herein by reference. This process involves many complex steps of plating and etching, and results in the formation of gold bumps on the metallized semiconductor chip pads. By this process, a gold bump is formed on each of the pads of each chip which is to be bonded to external circuitry either through an automatic tape bonding or flip-chip assembly process. The process is controlled to produce gold bumps of uniform thickness. In a typical TAB process, metal leads are subsequently bonded to the gold bumps for connecting the semiconductor chip to a substrate, for example through the use of a tape automated bonding (TAB) system. Such a TAB process is shown in an article by R. G. Oswald, J. M. Montante, and W. R. Rodrigues de Miranda, "Automated Tape Carrier Bonding for Hybrids", Solid State Technology, Vol. 21, No. 3, 39-48, (March 1978), the entirety of which is incorporated herein by reference. Alternatively, the plated or "bumped" chips can be used in a highly efficient and economical face-down bonding process wherein the chips are inverted and direct bonded to connection areas of a package. A typical face-down process is shown in an article by L. F. Miller, "A Survey of Chip Joining Techniques", Proc. 1969 Electronic Components Conference, pp. 60-76, the entirety of which is incorporated herein by reference.
While the plating process described above is adequate for use on a full wafer, it is prohibitively expensive and difficult to perform on individual or small quantities of chips. Applications requiring the packaging of discrete bare chips, for example the fabrication of densely packed custom circuits, require that each bare chip be wired in by the use of a gold or aluminum wire bonder. Such gold wire bonders typically comprise thermosonic or thermocompression methods, and enable a separate flying lead to be individually run between each metallized pad on the bare chip and its corresponding connection on a substrate. Such a process makes it impossible to take advantage of the less costly and faster processes of TAB or face-down bonding. Further, commercial and proprietary considerations make it difficult to even purchase bare chips or wafers, thereby making it difficult for a customer to perform his own wafer scale plating process even if he has available such a capability.
It would thus be desirable to provide a method of fabricating gold bumps on the metallized pads of small quantities of individual semiconductor chips which is economical to practice with commercially available equipment. Such a process would subsequently permit the chip to be mounted to a substrate using the economical and commercially available TAB or face-down bonding processes.